1. Field of the Invention
This invention relates to electronic systems, and more particularly to electrical interconnecting apparatus forming electrical power distribution structures.
2. Description of the Related Art
A power distribution network of a typical printed circuit board (PCB) includes several capacitors coupled between conductors used to convey direct current (d.c.) electrical power voltages and ground conductors. For example, the power distribution network of a digital PCB typically includes a bulk decoupling or xe2x80x9cpower entryxe2x80x9d capacitor located at a point where electrical power enters the PCB from an external power supply. The power distribution network also typically includes a decoupling capacitor positioned near each of several digital switching circuits (e.g., digital integrated circuits coupled to the PCB). The digital switching circuits dissipate electrical power during switching times (e.g., clock pulse transitions). Each decoupling capacitor typically has a capacitance sufficient to supply electrical current to the corresponding switching circuit during switching times such that the d.c. electrical voltage supplied to the switching circuit remains substantially constant. The power entry capacitor may, for example, have a capacitance greater than or equal to the sum of the capacitances of the decoupling capacitors.
In addition to supplying electrical current to the corresponding switching circuits during switching times, decoupling capacitors also provide low impedance paths to the ground electrical potential for alternating current (a.c.) voltages. Decoupling capacitors thus shunt or xe2x80x9cbypassxe2x80x9d unwanted a.c. voltages present on d.c. power trace conductors to the ground electrical potential. For this reason, the terms xe2x80x9cdecoupling capacitorxe2x80x9d and xe2x80x9cbypass capacitorxe2x80x9d are often used synonymously.
As used herein, the term xe2x80x9cbypass capacitorxe2x80x9d is used to describe any capacitor coupled between a d.c. voltage conductor and a ground conductor, thus providing a low impedance path to the ground electrical potential for a.c. voltages.
A typical bypass capacitor is a two-terminal electrical component. FIG. 1 is a diagram of an electrical model 10 of a capacitor (e.g., a bypass capacitor) valid over a range of frequencies including a resonant frequency fres of the capacitor. Electrical model 10 includes an ideal capacitor, an ideal resistor, and an ideal inductor in series between the two terminals of the capacitor. The ideal capacitor has a value C equal to a capacitance of the capacitor. The ideal resistor has a value equal to an equivalent series resistance (ESR) of the capacitor, and the ideal inductor has a value equal to an equivalent series inductance (ESL) of the capacitor. The series combination of the capacitance (C) and the inductance (ESL) of the capacitor results in series resonance and a resonant frequency fres given by:       f    res    =            1              2        ⁢        π        ⁢                                            (              ESL              )                        ⁢                          (              C              )                                            .  
FIG. 2 is a graph of the logarithm of the magnitude of the electrical impedance (Z) between the terminals of electrical model 10 versus the logarithm of frequency f. At frequencies flower than resonant frequency fres, the impedance of electrical model 10 is dominated by the capacitance, and the magnitude of Z decreases with increasing frequency f. At the resonant frequency fres of the capacitor, the magnitude of Z is a minimum and equal to the ESR of the capacitor. Within a range of frequencies centered about resonant frequency fres, the impedance of electrical model 10 is dominated by the resistance, and the magnitude of Z is substantially equal to the ESR of the capacitor. At frequencies f greater than resonant frequency fres, the impedance of electrical model 10 is dominated by the inductance, and the magnitude of Z increases with increasing frequency f.
When a desired electrical impedance between a d.c. voltage conductor and a ground conductor is less than the ESR of a single capacitor, it is common to couple more than one of the capacitors in parallel between the d.c. voltage conductor and the ground conductor. In this situation, all of the capacitors have substantially the same resonant frequency fres, and the desired electrical impedance is achieved over a range of frequencies including the resonant frequency fres.
When the desired electrical impedance is to be achieved over a range of frequencies broader than a single capacitor can provide, it is common to couple multiple capacitors having different resonant frequencies between the d.c. voltage conductor and the ground conductor. The ESRs and resonant frequencies of the capacitors are selected such that each of the capacitors achieves the desired electrical impedance over a different portion of the range of frequencies. In parallel combination, the multiple capacitors achieve the desired electrical impedance over the entire range of frequencies.
A digital signal alternating between high and low voltage levels includes contributions from a fundamental sinusoidal frequency (i.e., a first harmonic) and integer multiples of the first harmonic. As the rise and fall times of a digital signal decrease, the magnitudes of a greater number of the integer multiples of the first harmonic become significant. As a general rule, the frequency content of a digital signal extends to a frequency equal to the reciprocal of xcfx80 times the transition time (i.e., rise or fall time) of the signal. For example, a digital signal with a 1 nanosecond transition time has a frequency content extending up to about 318 MHz.
All conductors have a certain amount of electrical inductance. The voltage across the inductance of a conductor is directly proportional to the rate of change of current through the conductor. At the high frequencies present in conductors carrying digital signals having short transition times, a significant voltage drop occurs across a conductor having even a small inductance. Transient switching currents flowing through electrical impedances of d.c. power conductors cause power supply voltage perturbations (e.g., power supply xe2x80x9cdroopxe2x80x9d and ground xe2x80x9cbouncexe2x80x9d). As signal frequencies increase, continuous power supply planes (e.g., power planes and ground planes) having relatively low electrical inductances are being used more and more. The parallel power and ground planes are commonly placed in close proximity to one another in order to further reduce the inductances of the planes.
The magnitude of electrical impedance between two parallel conductive planes (e.g., adjacent power and ground planes) may vary widely within the frequency ranges of electronic systems with digital signals having short transition times. The parallel conductive planes may exhibit multiple electrical resonances, resulting in alternating high and low impedance values. High impedance values between power and ground planes are undesirable as transient switching currents flowing through the high electrical impedances cause relatively large power supply voltage perturbations.
It would thus be desirable to have a bypass capacitor method for achieving a desired value of electrical impedance between parallel conductive planes of an electrical power distribution structure, wherein variations in the electrical impedance are relatively small over a wide range of frequencies. It would also be advantageous if the desired method would provide for optional suppression of the electrical resonances of the planes in addition to achieving the desired value of electrical impedance over a wide range of frequencies. Magnitudes of power supply voltage perturbations resulting from transient switching currents would be significantly reduced in electrical power distribution structures resulting from applications of the above methods.
Several methods are presented for achieving a desired value of electrical impedance between conductors of an electrical power distribution structure by electrically coupling multiple bypass capacitors and corresponding electrical resistance elements in series between the conductors. The methods include bypass capacitor selection criteria and electrical resistance determination criteria based upon simulation results. An exemplary electrical power distribution structure produced by one of the methods includes a pair of parallel planar conductors separated by a dielectric layer, n discrete electrical capacitors, and n electrical resistance elements, where nxe2x89xa72. Each of the n discrete electrical resistance elements is coupled in series with a corresponding one of the n discrete electrical capacitors between the planar conductors. The n capacitors have substantially the same capacitance C, mounted resistance Rm, mounted inductance Lm, and mounted resonant frequency fm-res. The mounted resistance Rm of each of the n capacitors includes an electrical resistance of the corresponding electrical resistance element. The electrical power distribution structure achieves an electrical impedance Z at the resonant frequency fm-res of the capacitors. In order to achieve the desired value of electrical impedance, the mounted resistance Rm of each of the n capacitors is substantially equal to (nxc2x7Z). In order to reduce variations in the electrical impedance with frequency, the mounted inductance Lm of each of the n capacitors is less than or equal to (0.2xc2x7nxc2x7xcexc0xc2x7h), where xcexc0 is the permeability of free space, and h is a distance between the planar conductors. It is noted that dielectric materials used to form dielectric layers are typically non-magnetic, and thus the relative permeability xcexcr of the dielectric layer is assumed to be unity.
The mounted resistance Rm of each of the n capacitors may be, for example, the sum of an equivalent series resistance (ESR) of the capacitor, the electrical resistance of the corresponding electrical resistance element, and the electrical resistances of all conductors coupling the capacitor between the planar conductors. The mounted inductance Lm of each of the n capacitors may be the electrical inductance resulting from the coupling of the capacitor between the planar conductors. For example, each of the n capacitors may have a body. In this situation, the mounted resistance Rm of each of the n capacitors may be the sum of the ESR of the capacitor body, the electrical resistance of the corresponding electrical resistance element, and the electrical resistances of all conductors (e.g., solder lands and vias) coupling the capacitor body between the planar conductors. Similarly, the mounted inductance Lm of each of the n capacitors may be the electrical inductance resulting from the coupling of the capacitor body between the planar conductors. The mounted resonant frequency fm-res resulting from capacitance C and mounted inductance Lm may be given by:       f          m      -      res        =            1              2        ⁢        π        ⁢                                            (                              L                m                            )                        ⁢                          (              C              )                                            .  
The n discrete capacitors may or may not be used to suppress electrical resonances between the planar conductors. Where the n discrete capacitors are not used to suppress the electrical resonances, the n discrete capacitors may be located upon, and distributed about, one or more surfaces of the planar conductors. On the other hand, when the n discrete capacitors are used to suppress the electrical resonances, the n discrete capacitors may be positioned along at least a portion of corresponding outer edges of the planar conductors. In this situation, adjacent capacitors may be separated by substantially equal spacing distances.
Several embodiments of an electrical power distribution structure are presented including an electrical resistance element coupled in series with a capacitor between a pair of parallel conductive planes separated by a dielectric layer (e.g., between a power plane and a ground plane). In the embodiments, the electrical resistance elements are incorporated in ways which do not appreciably increase physical dimensions of current loops coupling the capacitor between the pair of parallel conductive planes. As a result, the mounted inductance Lm of the capacitor is not changed substantially over a corresponding conventional structure.
A first method for achieving a target electrical impedance Zt in an electrical power distribution structure including a pair of parallel planar conductors separated by a dielectric layer may be useful where bypass capacitors will not be used to suppress plane resonances. In this situation, the bypass capacitors may be distributed about a surface of at least one of the planar conductors. The first method includes determining a required number n of a selected type of discrete electrical capacitor dependent upon an inductance of the electrical power distribution structure Lp and a mounted inductance Lm of a representative one of the selected type of discrete electrical capacitor when electrically coupled between the planar conductors, wherein nxe2x89xa72. The required number n of the selected type of capacitor may be determined using:   n  =                    L        m                    (                  0.2          ·                      L            p                          )              .  
The target electrical impedance Zt is used to determine a required value of mounted resistance Rm-req for the n discrete electrical capacitors. The required value of mounted resistance Rm-req may be determined using:
Rm-req=nxc2x7Zt.
The required number n of the selected type of discrete electrical capacitor may be selected such that each of the n capacitors has an equivalent series resistance (ESR) which is less than the required value of mounted resistance Rm-req. The mounted resistance Rm of a representative one of the n capacitors may be determined when the representative capacitor is coupled between the pair of parallel planar conductors and when the electrical resistance of a corresponding electrical resistance element is zero. The electrical resistance of each of n electrical resistance elements may be determined by subtracting the mounted resistance Rm of the representative capacitor from the required value of mounted resistance Rm-req. The n discrete electrical capacitors and the n electrical resistance elements may be electrically coupled between the planar conductors such that each of the n discrete electrical capacitors is coupled in series with a corresponding one of the n electrical resistance elements.
The first method may also include determining a separation distance h between the parallel planar conductors required to achieve the target electrical impedance Zt. The separation distance h may be determined using:   h  =                    (                  Z          t                )            ⁢              (                              ϵ            r                          )            ⁢              (                  d          p                )                    (      0.523      )      
where xcex5r is the relative permittivity of the dielectric layer and dp is a distance around an outer perimeter of the electrical power distribution structure. Separation distance h is in mils when the target electrical impedance Zt is in ohms and distance dp is in inches.
A thickness t for the dielectric layer may be selected such that the thickness t is less than or equal to the required separation distance h. Thickness t may be used to determine the inductance of the electrical power distribution structure Lp. The inductance of the electrical power distribution structure Lp may be determined using:
Lp=(xcexc0xc2x7t)
wherein xcexc0 is the permeability of free space.
The type of discrete electrical capacitor may be selected, wherein capacitors of the selected type have at least one substantially identical physical dimension (e.g., a length of the capacitor package between terminals) upon which the mounted inductance of the capacitors is dependent. The physical dimension may be used to determine the mounted inductance Lm of the representative capacitor.
A second method for achieving a target electrical impedance Zt in an electrical power distribution structure including a pair of parallel planar conductors separated by a dielectric layer may be useful where the bypass capacitors will be used to suppress plane resonances. In this situation, at least a portion of the bypass capacitors will be electrically coupled between the planar conductors along an outer edge of the planar conductors. The second method includes determining a first required number n1 of discrete electrical capacitors dependent upon an inductance of the electrical power distribution structure Lp and a mounted inductance Lm of each of the discrete electrical capacitors when electrically coupled between the planar conductors, where n1xe2x89xa72. The first required number n1 of the discrete electrical capacitors may be determined using:       n    1    =                    L        m                    (                  0.2          ·                      L            p                          )              .  
A second required number n2 of the discrete electrical capacitors is determined dependent upon a distance dp around an outer perimeter of the electrical power distribution structure (i.e., the parallel planar conductors) and a spacing distance S between adjacent discrete electrical capacitors, where n2xe2x89xa72. The second required number n2 of the discrete electrical capacitors may be determined using:       n    2    =                    d        p            S        .  
Spacing distance S may be less than or equal to a maximum spacing distance Smax between adjacent electrical capacitors. The electrical power distribution structure may be, for example, part of an electrical interconnecting apparatus, and electrical signals may be conveyed within the electrical interconnecting apparatus. The electrical signals may have an associated frequency range, and maximum spacing distance Smax may be a fraction of a wavelength of a maximum frequency fmax of the frequency range of the electrical signals. Maximum spacing distance Smax may be given by:       S    max    =      0.1    ·          c              (                                            ϵ              r                                ·                      f            max                          )            
wherein c is the speed of light in a vacuum, xcex5r is the relative permittivity (i.e., the dielectric constant) of the dielectric layer, and fmax is the maximum frequency of the frequency range of the electrical signals.
If n2xe2x89xa7n1, the following steps may be performed. A required value of mounted resistance Rm-req may be determined for n2 of the discrete electrical capacitors dependent upon the target electrical impedance Zt. The required value of mounted resistance Rm-req for the n2 capacitors may be determined using:
Rm-req=n2xc2x7Zt.
The number n2 of the discrete electrical capacitors may be selected wherein each of the n2 capacitors has an equivalent series resistance (ESR) which is less than the required value of mounted resistance Rm-req. The mounted resistance Rm of a representative one of the n2 capacitors may be determined when the representative capacitor is coupled between the pair of parallel planar conductors and when the electrical resistance of a corresponding electrical resistance element is zero. The electrical resistance of each of n2 electrical resistance elements may be determined by subtracting the mounted resistance Rm of the representative capacitor from the required value of mounted resistance Rm-req. The n2 discrete electrical capacitors and the n2 electrical resistance elements may be electrically coupled between the planar conductors along the outer perimeter of the parallel planar conductors such that each of the n2 discrete electrical capacitors is coupled in series with a corresponding one of the n2 electrical resistance elements.
The second method may also include the determining of a separation distance h between the parallel planar conductors required to achieve the target electrical impedance Zt as described above. A thickness t for the dielectric layer may be selected such that the thickness t is less than or equal to the required separation distance h. Thickness t may be used to determine the inductance of the electrical power distribution structure Lp as described above.
The type of discrete electrical capacitor may be selected, wherein capacitors of the selected type have at least one substantially identical physical dimension (e.g., a length of the capacitor package between terminals) upon which the mounted inductance of the capacitors is dependent. The physical dimension may be used to determine the mounted inductance Lm of the representative capacitor.
If n1xe2x89xa7n2, the following steps may be performed. The target electrical impedance Zt may be used to determine a required value of mounted resistance Rm-req for n1 of the discrete electrical capacitors. The required value of mounted resistance Rm-req for the n1 capacitors may be determined using:
Rm-req=n1xc2x7Zt.
The number n1 of the discrete electrical capacitors may be selected, wherein each of the n1 capacitors has an equivalent series resistance (ESR) which is less than the required value of mounted resistance Rm-req. The mounted resistance Rm of a representative one of the n1 capacitors may be determined when the representative capacitor is coupled between the pair of parallel planar conductors and when the electrical resistance of a corresponding electrical resistance element is zero. The electrical resistance of each of n1 electrical resistance elements may be determined by subtracting the mounted resistance Rm of the representative capacitor from the required value of mounted resistance Rm-req. The n1 discrete electrical capacitors and the n1 electrical resistance elements may be electrically coupled between the planar conductors such that: (i) each of the n1 discrete electrical capacitors is coupled in series with a corresponding one of the n1 electrical resistance elements, (ii) n2 of the discrete electrical capacitors and the corresponding electrical resistance elements are positioned along an outer perimeter of the planar conductors, and (iii) the remaining (n1xe2x88x92n2) capacitors and the corresponding electrical resistance elements are dispersed across a surface of at least one of the planar conductors.
Regarding distance dp around the outer edges (i.e., the outer perimeter) of the electrical power distribution structure, the electrical power distribution structure may have, for example, four sides arranged as two pairs of opposite sides. The sides forming one of the pairs of opposite sides may have equal lengths x, and the other two opposite sides may have equal lengths y. In this situation, the distance dp around the outer perimeter of the electrical power distribution structure is equal to 2xc2x7(x+y).